Opinion · Court of Customs and Patent Appeals
Buck v. Desvignes
Buck v. Desvignes, 489 F.2d 737 (C.C.P.A. 1973)
- Type
- Opinion
- Court
- Court of Customs and Patent Appeals
- Jurisdiction
- Federal
- Date
- 1973-12-27
- Topic
- general
RICH, Judge. This appeal is from the decision of the Board of Patent Interferences awarding priority to Desvignes. The sole issue is Desvignes’ right to make count 2. We affirm. Buck et al.
Citator
UpLaw has not yet analyzed Buck v. Desvignes. The absence of a flag is not a finding that it is good law.
- Cited by
- 6 opinions
BUCK v. DESVIGNES,489 F.2d 737(C.C.P.A. 1973)
THOMAS M. BUCK ET AL., APPELLANTS, v. FRANCOIS DESVIGNES, APPELLEE.
Patent Appeal No. 9016.
United States Court of Customs and Patent Appeals.
December 27, 1973.
Carl P. Steinhauser, patent agent, for appellee. R. G. Pelton, Larchmont, N. Y., of counsel.
Before MARKEY, Chief Judge, and RICH, BALDWIN, LANE and MILLER, Judges.
[2] Buck et al. (Buck) filed no preliminary statement and are limited to the filing date of December 29, 1966, of Patent No. 3,403,284. Desvignes copied the count from the Buck patent into an application to reissue patent No. 3,322,955 which was awarded a convention date of December 24, 1959. The question is whether Desvignes' disclosure supports the count. On Buck's motion to dissolve on the ground Desvignes had no right to make the count, the Primary Examiner ruled against Buck and the Board of Patent Interferences affirmed, awarding priority to Desvignes.
[3] The invention relates to an improved target structure in television camera tubes. The Buck patent issued to Bell Telephone Laboratories, Inc., and the Desvignes patent to North American Philips Company, Inc. The count reads as follows:
[4] 2. In combination;
a target structure comprising a semi-conductive wafer, the wafer including adjacent one surface thereof an array of discrete rectifying barriers surrounded by regions free of rectifying barriers;
insulating means coating said surface selectively at portions overlying regions free of rectifying barriers and leaving exposed portions overlying the rectifying barriers;
means for forming and projecting an electron beam for scanning said one surface of the wafer;
and means for projecting an image to be recorded on the surface of the wafer opposite the one surface.
[5] This count is directed to a combination of elements embodying an improvement in the type of electronic tube known as a "vidicon"1which existedPage 738prior to the invention of either party. In this tube, which functions as part of the TV camera system, a lens focuses the image to be transmitted on one surface of a small, thin wafer which exhibits local conductivity variations representative of the incident light intensity. The opposite surface of the wafer, which is placed in an electronic circuit, is scanned by an electron beam. As the beam scans, the instantaneous electron beam current generates the video signal. In the above count, the last two elements, namely, means for producing and controlling the electron beam and the optical means for projecting an image on the wafer, were old in the art and form no part of the subject matter invented by either party.
[6] The language used to define the first element of the count — the target or wafer, which Desvignes also calls a plate or disc — has been the main subject of controversy in this interference and will require some discussion. The novel matter which is common to Buck and Desvignes, however, relates to the second element of the count — the insulating means coating those portions of one surface of the wafer which are free of rectifying barriers and exposing those barriers to the scanning electron beam.
[7] The count describes the first element as a wafer which has "adjacent one surface" an array of discrete rectifying barriers. We are here dealing with matter on a microscopic scale. Appellants' brief tells us that typical devices "have 300,0002single-barrier diodes formed into an area one-half inch square." Their patent explains that these diodes are produced by forming in a wafer of semiconductor material having n-type conductivity isolated p-type regions of about 8 microns in diameter (0.008 mm) with center-to-center spacing of about 20 microns in both the length and width directions. With thesediscretep-type regions formed into the surface of the n-type substrate, the p-type regions are, of course,surroundedby the original n-type material. It is not desired to have the electron beam strike the latter as it scans the surface and so the n-type material is covered, on that surface, by the insulating means which is the second element of the count.
[8] The Buck patent shows that this diode array structure per se was not Buck's invention but the invention disclosed in a prior patent of Reynolds, No. 3,011,089, issued Nov. 28, 1961, also assigned to Bell Telephone Laboratories, Inc. The Buck patent relates to improvements thereon, including the insulating layer of the count. The general description of this feature reads:
According to another feature, the p-type regions are insulated from each other and the n-type substrate is shielded from the beam by an insulating coating that exposes only the p-type regions to the beam. This feature prevents electron beam generation of spurious current in the output circuit which would otherwise result from bombardment of the substrate.
[9] Desvignes, instead of forming diodes in a wafer of semiconductor material, in effect produces transistors, which have three elements rather than two. He doubly diffuses the surface of a wafer, 25 mms. in diameter and 0.15 mm. thick, having n-type conductivity through openings in an insulating grid of silicon oxide formed on the surface by photoetching techniques. The diffusion is by a technique used in the manufacture of transistors and produces, through the insulating grid, n-type conductivity on the surface beneath which is a layer of p-type conductivity. He thus gets, instead of diodes, a mosaic of N-P-N junctions which are scanned by the electron beam. Desvignes says they operate as phototransistors. Like Buck, and for the same reason, he does not want the electron beam to strike the n-typesubstratematerial of the wafer which appears at the surface of the wafer surrounding the elements of thePage 739mosaic and his insulating grid serves to prevent that. Relevant here is his disclosure of the insulating grid, which reads:
The silicon-oxide pattern on the front side of the plate [wafer] has restricted the diffusion of boron and arsenic [the diffusing materials giving the p- and n-type conductivity] to small, separate squares, which exhibit a checkerboard pattern. By maintaining this silicon-oxide grid, I have prevented the initial disc material, which has n-type conductivity, from directly receiving electrons of the scanning beam.
[10] There has been no dispute about Desvignes' support for the insulating grid element of the count. Buck's argument has been centered on the fact that Buck discloses diode (P-N) regions formed into one surface of the wafer while Desvignes discloses N-P-N transistor type formations, similarly formed. With the aid of drawings of a schematic nature, Buck has zeroed in on the word "adjacent" in the first element of the count and some of the language associated therewith, attempting to persuade us that the count is limited to a diode structure, which he discloses and Desvignes does not.
[11] The board fully considered these arguments, giving its answer as follows:
As we read the count[,] giving the language the broadest interpretation which it reasonably will support, nothing is found in the count that would require a strict interpretation of "adjacent," or require reading "adjacent" in a limited sense as urged by Buck et al. In our opinion, the requirement, ". . . an array of discrete rectifying barriers surrounded by regions free of rectifying barriers;" is satisfied by the Desvignes structure which unquestionably has barrier-free regions between the areas E which completely encircle or encompass the areas E and hence surround those areas.
[12] The "areas E" referred to by the board are shown in Desvignes' Fig. 7 which is a greatly enlarged fragment of a target disc or wafer.
[13] [EDITORS' NOTE: FIGURE IS ELECTRONICALLY NON-TRANSFERRABLE.]
[14] The silicon crystal from which this disc is made is designated A. C3is the grid of silicon oxide insulation. The specification says "E designates diffusion having n-type conductivity at the surface and p-type conductivity underneath." The body of A has n-type conductivity. Therefore, proceeding from left to right through an opening in grid C and through an area E, the order of materials according to conductivity type is N-P-N. Each area E has, in effect, two "rectifying barriers," first, an N-P junction and then a P-N junction. As may be seen, around each area E and underlying grid C, the n-type base material of A completely surrounds each of the discrete areas E and, but for insulating grid C, it would be visible at the surface around each area E.
[15] If one imagines looking at the left hand surface of the wafer with the grid C removed, one would see "an array of discrete rectifying barriers surrounded by regions free of rectifying barriers." Thus, from this standpoint, the first element of the count clearly reads on Desvignes Fig. 7. As for the word "adjacent," it seems clear that the array is adjacent the surface being viewed, havingPage 740been formed by diffusion of boron and arsenic into that surface.
[16] Turning to the next element of the count, the "insulating means," we find a repetition of the identical phrase found in the first element, "regions free of rectifying barriers." It is these regions which the insulating grid C covers over, to prevent the electron beam from striking them so as not to produce spurious currents. Reasoning in reverse, one may ask whether the regions overlaid by the "insulating means coating said surface selectively" are "free of rectifying barriers," as called for by both the first and second elements of the count. It seems clear that they are, being the regions of the semiconductor body A which extend rearwardly from the surface to which the grid C is applied, between and around the areas E and including, in fact, the entire body of the wafer except for the areas E.
[17] We can see nothing unreasonable in thus reading the count and we therefore agree with the board's statement quoted above. We further note, with respect to construing the word "adjacent," that it is used in the count as a means for distinguishing one surface of the wafer from the other. Each of the four elements of the count refers to a surface. The first element refers to the "one surface" adjacent which the array occurs; the second element refers back to "said surface;" the third element again refers back to "said one surface;" and the last element refers to the "surface of the wafer opposite the one surface." In this context, we again agree with the board that there is no reason to read "adjacent" in a limited sense, as Buck urges.
[18] We are fully aware of all the finely-spun arguments of Buck, rejected by the board, by which he attempts to so construe the count as not to be supported by Desvignes' disclosure but we must reject them in following the applicable rule of law which is, as the board held, that the count must be given the broadest interpretation it will reasonably support. Martin v. Friendly,58 F.2d 421, 19 C.C.P.A. 1181 (1932); Wirkler v. Perkins,245 F.2d 502, 44 CCPA 1005 (1957). We feel, quite simply, that Buck is not giving the count its broadest reasonable interpretation but has, on the contrary, contrived a very narrow, artificial interpretation which refuses to apply the language of the count in its most obvious sense. We do not see why "an array of discrete rectifying barriers" cannot be read on an array of transistors as well as an array of diodes, considering that each transistor contains a barrier having a rectifying function. Buck has not shown us that it cannot. The board said, "we are of the view that the count is broad enough to read on both diode and transistor target structures."
[19] We do not find any ambiguity in the count. There is, therefore, no occasion to apply the rule applied in Smith v. Wehn,318 F.2d 325, 50 CCPA 1544 (1963), that when a count is ambiguous its meaning is to be determined from the disclosure of the specification in which it originated. However, even were we to do so, we would be unable to derive from the Buck specification, in which the word "adjacent" appears six times in varying contexts, apart from two appearances in claims, any basis for restricting the count to a diode structure, as Buck would have us do.
[20] The decision of the board awarding priority to Desvignes is affirmed.
[21] Affirmed.
a target structure comprising a semiconductive wafer, the wafer including adjacent one surface thereof an array of discrete rectifying barriers surrounded by regions free of rectifying barriers;
[24] Therefore, the question is not, as the majority puts it, whether "an array ofdiscreterectifying barriers" can be read on an array of transistors as well as an array of diodes. Of course it can. But there is more to the count, and the pertinentPage 741question is whether "an array of discrete rectifying barrierssurrounded by regions free of rectifying barriers" (which array is adjacent one surface of asemiconductivewafer) can be read on an array of transistors as well as an array of diodes. (Emphasis supplied.)
[25] To answer this question, one must determine whether the limitation "surrounded by regions free of rectifying barriers" applies to the word "array" or to the words "discrete rectifying barriers." If the latter, as appellants argue, then eachdiscreterectifying barrier must be surrounded by a region free of rectifying barriers. The limitation is clearly satisfied by a diode. It would be violated by a transistor, since one of the two discrete rectifying barriers in a transistor contained within asemiconductivewafer (which Desvignes discloses) must surround the other in anested-typestructure — otherwise the two barriers would, through the semiconductive substrate, form a single barrier; and the structure would no longer be a transistor, as required by Desvignes. From the figure below taken from the record and prepared by Buck, with no objection from Desvignes appearing, it is clear that Desvignes uses the nested-type structure.
[26] [EDITORS' NOTE: STRUCTURE IS ELECTRONICALLY NON-TRANSFERRABLE.]
[27] To interpret the limitation, "surrounded by regions free of rectifying barriers," as applying to the word "array" causes difficulty with the word "regions." Surroundinganarray there would bearegion free of rectifying barriers — not regions. However, "regions" fits if the limitation is interpreted as applying to "discrete rectifying barriers." Surrounding each discrete rectifying barrier in an array of diodes would be a region free of rectifying barriers; and surrounding a multiple of such barriers would, of course, be regions free of rectifying barriers.
[28] If there is doubt over whether the limitation applies to "array" rather than to "discrete rectifying barriers," it would seem that Desvignes has not sustained his burden of proof. Gubelmann v. Gang,408 F.2d 758, 56 CCPA 1013 (1969). At the very least, we have an ambiguity in the count which necessitates looking to the Buck patent. Smith v. Wehn,318 F.2d 325, 50 CCPA 1544 (1963).
[29] The majority opinion properly points out that Buck's patent relates to improvements on the Reynolds patent. Some of these have to do with the insulating means limitation of the count which Desvignes appears to meet. However, as noted above, the issue of whether Desvignes has sustained his burden of proving that he meets the count centers on the limitations involving the target structure, some of which, at least, Buck appears to have taken from Reynolds. Thus, Buck's specification refers to the Reynolds patent as using a scanning electron beam, with a target structure "having an array of isolated p-type regions on the target surface each of which forms a junction diode with the substrate."
[30] Describing his invention, Buck's specification reads, in part, as follows:
A target surface of an n-type semiconductor contains an array of p-type regions which is repetitively scanned by an electron beam. The opposite side of the semiconductor is exposed to incoming light which induces current across the p-n junctions as describedPage 742before. As a result, different p-n diodes manifest varying degrees of discharge resulting in a fluctuating current in the semiconductor as the beam scans successive p-type regions recharging them to the full target voltage.
[31] The difference between Buck's p-n junction structure and Desvignes' two p-n junction structure can be seen from the above figure illustrating the Desvignes device.
[32] Throughout, Buck's specification speaks of "diode," "diodes," "p-n diodes," "diode array," "target diode array," "diode target array," "diode junction," "diode capacitance," "target surface diodes," and "regional rectifying diode array."
[33] Finally, it is to be noted that the record shows that the examiner allowed the Buck patent notwithstanding citation to the original Desvignes patent.SeeMcCutchen v. Oliver,367 F.2d 609,616, 54 CCPA 756, 765 (1966).
[34] Accordingly, I would hold that Desvignes has not met his burden of proving that his disclosure supports the count and reverse the decision of the board.
- The Random House Dictionary (1967) contains the following definition:
vidicon* * * n.Television.A camera tube in which a charge-density pattern is formed on a photo-conductive surface scanned by a beam of low-velocity electrons for transmission as signals.
↩ - At oral argument, Buck's attorney used the figure 30,000 which seems more likely to be the correct figure. ↩
- There is an apparent error in Desvignes' designation as other figures and the specification designate the insulation as "B". ↩